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STBP120
Overvoltage protection device with thermal shutdown
Features

Input overvoltage protection up to 28 V Integrated high voltage N-channel MOSFET switch Low RDS(on) of 90 m Integrated charge pump Thermal shutdown protection Softstart feature to control the inrush current Enable input (EN) Fault indication output (FLT) IN input ESD withstand voltage up to 15 kV (air discharge), up to 8 kV (contact discharge) in typical application circuit with 1F input capacitor (2 kV HBM for standalone device) Certain overvoltage options compliant with the China Communications Standard YD/T 15912006 (overvoltage protection only) Small, RoHS compliant 2.5 x 2 mm TDFN - 10-lead package. TDFN - 10-lead (2.5 x 2 mm)
Applications

Smart phones Digital cameras PDA and palmtop devices MP3 players Low-power handheld devices.
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www.st.com 1
Contents
STBP120
Contents
1 2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 2.2 2.3 2.4 2.5 2.6 Input (IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power output (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Fault indication output (FLT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Enable input (EN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 No Connect (NC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ground (GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 3.2 3.3 3.4 3.5 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Overvoltage lockout (OVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1 4.2 4.3 Calculating the power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Calculating the junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 PCB layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 6 7 8 9 10
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Typical application performance (STBP120DVDK6F) . . . . . . . . . . . . . 19 Typical thermal characteristics (STBP120DVDK6F) . . . . . . . . . . . . . . . 24 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
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11 12 13 14
Tape and reel specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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List of tables
STBP120
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Pin description and signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 TDFN - 10-lead, 2.5 x 2.0 x 0.75 mm body, pitch 0.50 mm, package mechanical data dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Further tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
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List of figures
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Maximum MOSFET current at TA = 85 C for various PCB thermal performance and TJ = 125 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Disable (EN = high). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 FLT behavior in disable (EN = high) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Startup delay, ton . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 FLT indication delay (OK), tstart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Output turn-off time, t off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 FLT indication delay (FAULT), tstop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Disable time, tdis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Startup to overvoltage and startup V O(FLT) delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Startup inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Output short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Output short-circuit detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 ICC vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 ICC(STDBY) vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 ICC(UVLO) at 2.9 V vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 VOVLO vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 VUVLO vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 VOL(FLT) at 1 mA vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 RDS(on) at 1 A vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 TDFN - 10-lead, 2.5 x 2.0 x 0.75 mm body, pitch 0.50 mm, package mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Tape and reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
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Description
STBP120
1
Description
The STBP120 device provides overvoltage protection for input voltage up to +28 V. Its low RDS(on) N-channel MOSFET switch protects the systems connected to the OUT pin against failures of the DC power supplies in accordance with the China MII Communications Standard YD/T 1591-2006. In the event of an input overvoltage condition, the device immediately disconnects the DC power supply by turning off an internal low R DS(on) N-channel MOSFET to prevent damage to protected systems. In addition, the device also monitors its own junction temperature and switches off the internal MOSFET if the junction temperature exceeds the specified limit. The device can be controlled by the microcontroller and can also provide status information about fault conditions. The STBP120 is offered in a small, RoHS-compliant TDFN - 10-lead (2.5 mm x 2 mm) package.
Figure 1.
Logic diagram
IN
OUT EN
STBP120
FLT
GND
AM00240
Figure 2.
Pinout (1)
NC GND FLT IN IN
1 2 3 4 PAD2 5 PAD1
10 9 8 7 6
EN NC NC OUT OUT
AM00239
1. Pin 1, PAD1 and PAD2 are No Connect (NC) and may be tied to IN or GND.
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STBP120
Pin descriptions
2
2.1
Pin descriptions
Input (IN)
Input voltage pin. This pin is connected to the DC power supply. External low ESR ceramic capacitor of minimum value 1 F must be connected between IN and GND. This capacitor is for decoupling and also protects the IC against dangerous voltage spikes and ESD events. This capacitor should be located as close to the IN pins as possible. All IN pins (4, 5) must be hardwired to common supply.
2.2
Power output (OUT)
Output voltage pin. This pin is connected to the input through a low RDS(on) N-channel MOSFET switch. If no fault is detected and the STBP120 is not disabled (controlled by the EN input), this switch is turned on and the output voltage follows the input voltage. The output is disconnected from the input when the input voltage is under the UVLO threshold or above the OVLO threshold, when the chip temperature is above the thermal shutdown threshold or when the chip is disabled by the EN input. There is a 50 ms delay, t on, between input voltage or junction temperature returns to specified range and the power output is connected to the input (see Figure 6). All OUT pins (6, 7) must be hardwired to common supply.
2.3
Fault indication output (FLT)
The fault indication output (active-low - open-drain) provides information on the STBP120 state to the application controller. When FLT is active (i.e. driven low), this indicates the STBP120 is in the undervoltage or overvoltage condition or thermal shutdown mode is active. When the input voltage and junction temperature is in specified range, the FLT output is in high impedance (Hi-Z) state. There is an additional 50 ms delay, tstart, between the power output is connected to the input and the FLT output is deactivated (i.e. in Hi-Z state) (see Figure 6). Since the FLT output is of open-drain type, it may be pulled up by an external resistor RP to the controller supply voltage. If there is no need to use this output, it may be left disconnected. The suitable RP resistor value is in range of 10 k to 1 M . To improve safety and to prevent damage to application circuits in the event of extreme voltage or current conditions, an optional protective resistor R FLT can be connected between the FLT output and the controller input. The suitable RFLT resistor value is in range of 22 k to 100 k. The function of the FLT output is not affected by the EN input state (see Figure 9).
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Pin descriptions
STBP120
2.4
Enable input (EN)
This logical input (active-low) can be used to enable or disable the device. When EN input is driven high, the STBP120 enters the standby mode and the power output is disconnected from the input. When EN input is driven low and all operating conditions are within specified limits, the power output is connected to the input. Since the EN input has no internal pull-down resistor, its logical level must be defined by the controller or by an external resistor. If there is no need to use this input, it should be connected to the GND. To improve safety and to prevent damage to application circuits in the event of extreme voltage or current conditions, an optional protective resistor REN can be connected between the EN input and the controller output. The suitable resistor value is in range of 22 k to 100 k . The EN input level has no impact on the functionality of FLT output (see Figure 8 and Figure 9).
2.5
No Connect (NC)
Pins 1, 8, 9 and exposed pads PAD1, PAD2 are No Connect. Pin 1 and exposed pads PAD1, PAD2 may be tied to IN or GND if necessary.
2.6
Ground (GND)
Ground. All voltages are referenced to GND.
Table 1.
Pin
Pin description and signal names
Name NC GND FLT IN OUT NC EN Type -- Supply Output Input / supply Output -- Input Function No Connect. May be tied to IN or GND. Ground Fault indication output (open-drain) Input voltage Output voltage No Connect Enable input (no internal pull-down resistor)
1, PAD1, PAD2 2 3 4, 5 6, 7 8, 9 10
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STBP120 Figure 3. Block diagram
Pin descriptions
IN ESD protection Core negative protection SUPPLY REGULATOR VCC VREF VOLTAGE REFERENCE COUNTERS CHARGE PUMP MOSFET DRIVER
OUT
OSCILLATOR
OFF
Input overvoltage FLT CONTROL LOGIC Input undervoltage MCU INTERFACE EN Temperature Thermal shutdown detector
ESD protection
ESD protection
GND
AM00306
Figure 4.
Typical application circuit(1),(2)
PERIPHERAL SUPPLY CURRENT CHARGING CURRENT IN OUT C2 1 F
AC adapter
SYSTEM CONNECTOR OR
DC-DC EN CHARGER IC ENABLE
BATTERY PACK
C1 1 F
STBP120
SUPPLY CIRCUITS
RPU
POWERED PERIPHERALS FLT EN GND
RFLT REN
CONTROLLER
APPLICATION
AM00314a
1. Optional resistors REN, R FLT prevent damage to the controller under extreme voltage or current conditions and are not required. Low ESR ceramic capacitor C1 is necessary to ensure proper function of the STBP120. Capacitor C2 is not necessary for STBP120 but may be required by the charger IC. 2. The STBP120 MOSFET switch topology allows the current to also flow in the reverse direction, from OUT to IN, which can be useful for powering external peripherals from the system connector. The charger IC should not contain the reverse diode to prevent the battery pack voltage from appearing on the system connector. If the reverse current (supply current) is undesirable, it may be prevented by connecting a Schottky diode in series with the OUT pin. The voltage drop between IN and charger is increased by the voltage drop across the diode.
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Operation
STBP120
3
Operation
The STBP120 provides overvoltage protection for positive input voltage up to 28 V using a built-in low R DS(on) N-channel MOSFET switch.
3.1
Power-up
At power-up, with EN = low, the MOSFET switch is turned on after a 50 ms delay, ton, after the input voltage exceeds the UVLO threshold to ensure the input voltage is stabilized. After an additional 50 ms delay, t start, the FLT indication output is deactivated (see Figure 6). The FLT output state is valid for VIN input voltage 1.2 V or higher.
3.2
Normal operation
The device continuously monitors the input voltage and its own internal temperature so the output voltage is kept within the specified range. Internal MOSFET switch is turned on and the FLT output is not active. The STBP120 enters normal operation state if the input voltage returns to the interval between VUVLO and VOVLO - VHYS(OVLO) and the junction temperature falls below TOFF THYS(OFF). Internal MOSFET is turned on after the 50 ms delay ton to ensure that the conditions have stabilized. Then, after an additional 50 ms delay, tstart, the FLT output is deactivated (i.e. driven high). This behavior is equivalent to the startup shown on Figure 6.
Note:
The STBP120 MOSFET switch topology allows the current to also flow in the reverse direction, i.e. from OUT to IN, which can be useful e.g. for powering external peripherals from the system connector (see the supply current in Figure 4). At first, the current flows through the MOSFET body diode. If the voltage that appears on the IN terminal is above the UVLO threshold, the MOSFET is (after the 50 ms startup delay) turned on so the voltage drop across STBP120 is significantly reduced. The charger IC should not contain the reverse diode to prevent the battery pack voltage from appearing on the system connector. If the reverse current is undesirable, it may be prevented by connecting a properly rated low drop Schottky diode in series with the OUT pin. The voltage drop between IN and charger is increased by the voltage drop across the diode. Due to the MOSFET body diode, thermal shutdown protection is not functional for the supply current.
3.3
Undervoltage lockout (UVLO)
To ensure proper operation under any conditions, the STBP120 has an undervoltage lockout (UVLO) threshold. For rising input voltage, the output remains disconnected from input until VIN voltage exceeds the VUVLO threshold (3.25 V typ). The FLT output is driven low as long as VIN is below the UVLO threshold (assuming the input voltage is above 1.2 V). For falling input voltage, the UVLO circuit has a 50 mV hysteresis, VHYS(UVLO), to improve noise immunity under transient conditions.
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STBP120
Operation
3.4
Overvoltage lockout (OVLO)
If the input voltage V IN rises above the threshold level VOVLO, the MOSFET switch is immediately turned off (see Figure 7). At the same time, the fault indication output FLT is activated (i.e. driven low). This device is equipped with hysteresis, V HYS(OVLO), to improve noise immunity under transient conditions. For available OVLO thresholds and hystereses, please see the Table 5.
3.5
Thermal shutdown
If the STBP120 internal junction temperature exceeds the TOFF threshold, internal MOSFET switch is turned off and the fault indication output FLT is driven low. To improve thermal stability, this circuit has a 20 C hysteresis, THYS(OFF).
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Application information
STBP120
4
4.1
Application information
Calculating the power dissipation
The maximum power dissipation of the STBP120 internal power MOSFET can be calculated using following formula: PD = I2 x RDS(on)(max), Where I is current flowing through the MOSFET and RDS(on)(max) is maximum value of MOSFET resistance. Example: Rload = 5 , VIN = 5 V, R DS(on)(max) = 150 m I = VIN / (R DS(on)(max) + R load) = 5 / (5 + 0.150) = 0.97 A PD = 0.972 x 0.15 = 0.14 W The power dissipation of reverse diode (in powering peripherals mode) can be estimated as PD = (VOUT - VIN) x I 0.7 x I.
4.2
Calculating the junction temperature
The maximum junction temperature for given power dissipation, ambient temperature and thermal resistance junction - to - ambient can be calculated as TJ = TA + 1.15 x P D x RthJA = TA + 1.15 x I2 x RDS(on)(max) x RthJA, where TJ is junction temperature, TA is given ambient temperature, 1.15 is a derating factor and R thJA is thermal resistance junction - to - ambient, depending on shape, dimension and design of PCB. Two examples of PCB with appropriate thermal resistance are listed in Table 3. The junction temperature may not exceed 125 C (see Table 4), due to TOFF (thermal shutdown threshold temperature). Maximum allowed MOSFET current for ambient temperature TA = 85 C and various RthJA values are listed in Figure 5. Example: For conditions listed in previous example, well designed PCB (R thJA = 82 C/W) and TA = 85 C, the maximum junction temperature is 85 + 1.15 x 0.14 x 82 = 98.2 C.
4.3
PCB layout recommendations
This device is intended as a protection device to the application from overvoltage. It must be ensured that the clearances between PCB tracks satisfy the high voltage design rules. Input capacitor, C1, should be located as close as possible to the STBP120 device. It should be a Low-ESR ceramic capacitor. Also the protective resistors RFLT, REN (if used) should be located close to the STBP120. For good thermal performance, it is recommended to connect the STBP120 exposed thermal pads with the PCB ground plane. In most designs, this requires thermal vias between the copper pads on PCB and the ground plane.
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STBP120
Maximum rating
5
Maximum rating
Stressing the device above the rating listed in the "absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 2.
Symbol TSTG TSLD(1) TJ
(2)
Absolute maximum ratings
Parameter Storage temperature (V IN off) Lead solder temperature for 10 seconds Operating junction temperature range Operating ambient temperature range Input voltage (pins IN) Input / output voltage (pins OUT) Input / output voltage (other pins) Input / output current through MOSFET (pins IN, OUT) Output current (pin FLT) ESD withstand voltage (IEC 61000-4-2, pins IN only)(3) Value -55 to 150 260 -40 to 150 -40 to 85 -0.3 to 30 -0.3 to 12 -0.3 to 7 2000 15 15 (air), 8 (contact) 2000 200 Unit C C C C V V V mA mA kV V V
TA VIN VIO(OUT) VIO IIN, IOUT(MOSFET) I(FLT)
VESD
Human body model (HBM), Model = 2 (4) Machine model (MM), Model = B(5)
1. Reflow at peak temperature of 260 C. The time above 255 C must not exceed 30 seconds. 2. Maximum junction temperature is internally limited by the thermal shutdown circuit (not valid for reverse current, see Chapter 3.2). 3. System-level value (see Figure 4, C1 1 F low ESR ceramic capacitor). 4. Human body model, 100 pF discharged through a 1.5k resistor according the JESD22/A114 specification. 5. Machine model, 200 pF discharged through all pins according the JESD22/A115 specification.
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Maximum rating Table 3.
Symbol RthJA RthJC
.
STBP120 Thermal data
Parameter Thermal resistance (junction to ambient) Thermal resistance (junction to case) Value 204 (1) 82(2) 43 Unit C/W C/W
1. The package is mounted on a 2-layers (1S) JEDEC board as per JESD51-7 without thermal vias underneath the exposed pads. 2. The package is mounted on a 4-layers (2S2P) JEDEC board as per JESD51-7 with 2 thermal vias (one underneath each exposed pad) as per JESD-51-5. Thermal vias connected from exposed pad to 1'st buried copper plane of PCB.
Figure 5.
Maximum MOSFET current at TA = 85 C for various PCB thermal performance and TJ = 125 C
2.10 1.90 1.70
I (MOSFET) 1.50
[A]
1.30 1.10 0.90 0.70 50 100 150 200 250 300 350
Rth JA [C/W]
AM00428b
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Doc ID 15492 Rev 4
STBP120
DC and AC parameters
6
DC and AC parameters
This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics tables that follow are derived from tests performed under the measurement conditions summarized in Table 4. Designers should check that the operating conditions in their circuit match the operating conditions when relying on the quoted parameters.
Table 4.
Operating and AC measurement conditions
Parameter Value 5 -40 to 85 -40 to 125 5 Unit V C C
Input voltage (V IN) Ambient operating temperature (TA) Junction operating temperature (T J) Output load resistance (R load)
Table 5.
Symbol VIN VUVLO VHYS(UVLO)
DC and AC characteristics
Description Input voltage range Input undervoltage lockout threshold Undervoltage lockout hysteresis VIN rises up OVLO threshold, OVLO option A Test condition(1) Min 1.2 3.1 20 3.25 50 Typ Max Unit 28 3.4 100 V V mV
5.25 5.375 5.50 5.30 5.71 5.70 30 5.50 5.85 6.02 60 90 170 96 70 20 5.70 6.00 6.40 90 150 250 150 100 400 400 5 0.4 1.2 mV m A A A mV mV nA V V 5 nA V
VOVLO
Overvoltage lockout threshold
VIN rises up OVLO threshold, OVLO option B VIN rises up OVLO threshold, OVLO option C VIN rises up OVLO threshold, OVLO option D
VHYS(OVLO) RDS(on) ICC ICC(STDBY) ICC(UVLO) VOL(FLT) IL(FLT) VIL(EN) VIH(EN) IL(EN)
Input overvoltage hysteresis IN to OUT resistance Operating current Standby current UVLO operating current FLT output low level voltage FLT output leakage current EN low level input voltage EN high level input voltage EN input leakage current V(EN) = 0 V or 5 V EN = 0 V, VIN = 5 V, Rload connected to OUT EN = 0 V, no load on OUT, VIN = 5 V EN = 5 V, no load on OUT, VIN = 5 V VIN = 2.9 V 1.2 V < VIN < VUVLO, ISINK(FLT) = 50 A VIN > VOVLO, ISINK(FLT) = 1 mA V(FLT) = 5 V
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DC and AC parameters Table 5.
Symbol Timing parameters ton tstart toff(2) Startup delay FLT indication delay (OK) Output turn-off time Time measured from VIN > VUVLO to VOUT = 0.3 V (see Figure 6) Time measured from VOUT = 0.3 V to V(FLT) = 1.2 V (see Figure 6) Time measured from VIN > VOVLO to VOUT 0.3 V. VIN increasing from 5.0 V to 8.0 V at 3.0 V/s, Rload connected to OUT. (see Figure 7) Time measured from VIN > VOVLO to V(FLT) 0.4 V. VIN increasing from 5.0 V to 8.0 V at 3.0 V/s, Rload connected to OUT. (see Figure 7) Time measured from V(EN) 1.2 V to VOUT < 0.3 V. Rload connected to OUT. (see Figure 8) 30 30 50 50
STBP120
DC and AC characteristics (continued)
Description Test condition(1) Min Typ Max Unit
70 70
ms ms
1.5
5
s
tstop(2)
FLT indication delay (FAULT)
1
s
tdis(2) Thermal shutdown TOFF THYS(OFF)
Disable time
1
5
s
Thermal shutdown threshold temperature Thermal shutdown hysteresis
130
145 20
C C
1. Test conditions described in Table 4 (except where noted). 2. Guaranteed by design. Not tested in production.
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STBP120
Timing diagrams
7
Timing diagrams
Figure 6. Startup(1)
OVLO UVLO VIN 0.3 V VOUT 1.2 V V(FLT)
AM00335
ton tstart
1. EN input is low.
Figure 7.
Overvoltage protection(1)
OVLO VIN UVLO toff 0.3 V tstop 0.4 V V(FLT)
AM00336
VOUT
1. EN input is low.
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Timing diagrams
STBP120
Figure 8.
Disable (EN = high) (1)
1.2 V V(EN) OVLO UVLO tdis 0.3 V VOUT
AM00337
VIN
1. FLT output still indicates the VIN status.
Figure 9.
FLT behavior in disable (EN = high)
1.2 V V(EN) OVLO UVLO VIN 1.2 V VFLT
AM00338
equiv. to ton + tstart
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STBP120
Typical application performance (STBP120DVDK6F)
8
Typical application performance (STBP120DVDK6F)
Figure 10. Startup delay, t on
1. The "leakage" on the VOUT trace is a crosstalk caused mainly by the parasitic capacitances of the MOSFET switch. 2. No load on the output.
Figure 11. FLT indication delay (OK), tstart
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Typical application performance (STBP120DVDK6F) Figure 12. Output turn-off time, toff
STBP120
1. 5 load on the output.
Figure 13. FLT indication delay (FAULT), tstop
1. 5 load on the output.
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STBP120 Figure 14. Disable time, t dis
Typical application performance (STBP120DVDK6F)
1. No change in V O(FLT) status during disable. 2. 5 load on the output.
Figure 15. Startup to overvoltage and startup VO(FLT) delay
1. 5 load on the output.
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Typical application performance (STBP120DVDK6F) Figure 16. Startup inrush current
STBP120
1. Output load 5 in parallel with C = 100 F, power supply cable inductance 1 H, power supply cable resistance 0.3 .
Figure 17. Output short-circuit
1. See also details on Figure 18. 2. Power supply cable inductance 1 H, power supply cable resistance 0.3 .
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STBP120
Typical application performance (STBP120DVDK6F) Figure 18. Output short-circuit detail
1. Due to power supply cable impedance, during the output short-circuit the input voltage falls below the VUVLO threshold, resulting in turning off the power MOSFET and preventing any damage to the components. 2. Power supply cable inductance 1 H, power supply cable resistance 0.3 .
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Typical thermal characteristics (STBP120DVDK6F)
STBP120
9
Typical thermal characteristics (STBP120DVDK6F)
Figure 19. ICC vs. temperature
180 170 160 150 140
ICC [A]
130 120 110 100 90 80 -50 0 50 100 150
AM00415
Temperature [C]
Figure 20. ICC(STDBY) vs. temperature
120 110 100 90
ICC(STDBY) [A]
80 70 60 50 40 -50 0 50 100 150
AM00416
Temperature [C]
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STBP120 Figure 21. ICC(UVLO) at 2.9 V vs. temperature
80.0 70.0 60.0
Typical thermal characteristics (STBP120DVDK6F)
ICC(UVLO) [A] 50.0
40.0 30.0 20.0 -50 0 50 100 150
AM00417
Temperature [C]
Figure 22. VOVLO vs. temperature
6.3
6.2
6.1
VOVLO [V]
6
5.9
5.8 -50 0 50 100 150
AM00420
Temperature [C]
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Typical thermal characteristics (STBP120DVDK6F) Figure 23. VUVLO vs. temperature
3.4 3.35
STBP120
3.3
VUVLO [V]
3.25 3.2
3.15 3.1 -50 0 50 100 150
AM00422
Temperature [C]
Figure 24. VOL(FLT) at 1 mA vs. temperature
0.1 0.09 0.08
VOL(FLT) [V]
0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 -50 0 50 100 150
AM00424
Temperature [C]
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STBP120 Figure 25. RDS(on) at 1 A vs. temperature
140.0 120.0 100.0 80.0 60.0 40.0 20.0 0.0 -50 0
Typical thermal characteristics (STBP120DVDK6F)
RDS(on) [m]
50
100
150
AM00427
Temperature [C]
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Package mechanical data
STBP120
10
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark.
Figure 26. TDFN - 10-lead, 2.5 x 2.0 x 0.75 mm body, pitch 0.50 mm, package mechanical drawing
D
A
B
INDEX AREA
E
0.10 C 2x
0.10 C 2x TOP VIEW 0.10 C
A1
C
A
SEATING PLANE SIDE VIEW 0.08 C LEADS COPLANARITY
D2-2
e
5
1 PIN#1 ID
K (x10)
0.350
INDEX AREA
E2
0.195 0.195
L (x10)
b (x10) 0.10 CAB 10
0.025
BOTTOM VIEW
D2-1
10L_ME
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STBP120 Table 6.
Package mechanical data TDFN - 10-lead, 2.5 x 2.0 x 0.75 mm body, pitch 0.50 mm, package mechanical data dimensions(1)
(mm) Symbol Min. A A1 b D BSC D2-1 D2-2 E BSC E2 e L K N 0.20 0.20 10 0.75 0.53 0.93 0.70 0.00 0.18 Nom. 0.75 0.02 0.25 2.50 0.68 1.08 2.00 0.90 0.50 0.30 0.40 0.008 0.008 10
(2)
(inches) Note Max. 0.80 0.05 0.30 Min. 0.028 0.000 0.007 Nom. 0.030 0.001 0.010 0.098 0.78 1.18 0.021 0.037 0.027 0.043 0.079 1.00 0.030 0.035 0.020 0.012 0.016 0.039 0.031 0.046 Max. 0.031 0.002 0.012
1. Controlling dimension: millimeters. 2. N is the total number of terminals.
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Tape and reel specification
STBP120
11
Tape and reel specification
Figure 27. Tape and reel
P0 D T A0 Top cover tape B0 P2 E
F W
K0
Center lines of cavity User direction of feed
P1
AM03073v2
Table 7.
Tape size 12
Carrier tape dimensions
W 12.00 0.30 D 1.50 +0.10 / -0.00 E 1.75 0.10 Po P2 F 5.50 0.05
4.00 0.10 2.00 0.10
Table 8.
Further tape and reel information
W 12 Ao 2.30 0.10 Bo 2.80 0.10 Ko P1 T Bulk Qty. 3000 Reel Diameter 13
Package code 2 x 2.5mm TDFN 10 lead
1.10 4.00 0.30 0.01 0.10 0.05
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STBP120 Figure 28. Reel dimensions
Tape and reel specification
T
40 mm min. acces hole at slot location B
D A
C
N
Full radius Tape slot in core for tape start 25 mm min width G measured at hub
AM00443
Table 9.
Tape size 12 mm
Reel dimensions
A max. 330 (13 inch) B min. 1.5 C 13 0.2 D min. 20.2 N min. 60 G 12.4 + 2 / - 0 T max. 18.4
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Tape and reel specification Figure 29. Tape trailer/leader
End
STBP120
Start
Top cover tape
No components T RA IL ER 160 mm min.
Components
100 mm min.
No components L EA D ER
400 mm min.
Sealed with cover tape
User direction of feed
AM00444
Figure 30. Pin 1 orientation
Direction of feed
AM00442a
Note:
1 2
Drawings are not to scale. All dimensions are in mm, unless otherwise noted.
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STBP120
Part numbering
12
Part numbering
Table 10. Ordering information scheme
STBP120 D V DK 6 F
Device type STBP120
Overvoltage threshold A = 5.375 V B = 5.50 V C = 5.85 V D = 6.02 V
Undervoltage threshold V = 3.25 V
Package DK = TDFN - 10-lead, 2.5 x 2 mm
Temperature range 6 = -40 C to +85 C
Shipping method F = ECOPACK(R) package, tape and reel
Note:
Other overvoltage thresholds are offered. Minimum order quantities may apply. Contact local sales office for availability.
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Package marking information
STBP120
13
Package marking information
Table 11. Marking description
Overvoltage threshold (V) 5.375 5.50 5.85 6.02 Topside marking P12A P12B P12C P12D
Part number(1) STBP120AVxxxx STBP120BVxxxx STBP120CVxxxx STBP120DVxxxx
1. Other overvoltage thresholds are offered. Minimum order quantities may apply. Contact local sales office for availability.
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STBP120
Revision history
14
Revision history
Table 12.
Date 20-Mar-2009 07-Apr-2009 29-Apr- 2009
Document revision history
Revision 1 2 3 Initial release. Updated Section 2, Section 3, Figure 5, ton and tstart in Table 5 and shipping method in Table 10, added Section 8 and Section 9. Updated the revision history table - removed the draft revisions. Updated Features, Section 4.3, Table 2, Figure 5, Table 5, Figure 10, Figure 12, Figure 13, Figure 14, Figure 15, Figure 16, Figure 17, Figure 18, removed Figure 22, Figure 23, Figure 25, Figure 27, Figure 29, Figure 30, added Section 11: Tape and reel specification. Changes
01-Jun-2009
4
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STBP120
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